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2 changed files with 60 additions and 22 deletions

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@ -8,7 +8,7 @@
// disable watchdog, // disable watchdog,
// and DO NOT disable low voltage programming. // and DO NOT disable low voltage programming.
// The rest of fuses are left as default. // The rest of fuses are left as default.
__code uint16_t __at (_CONFIG1) __configword = _WDTE_OFF & _BOREN_ON & _CP_OFF; __code uint16_t __at (_CONFIG1) __configword = _FOSC_INTOSC & _CLKOUTEN_OFF & _WDTE_OFF & _BOREN_ON & _CP_OFF;
#define LED_PORT PORTCbits.RC5 #define LED_PORT PORTCbits.RC5
#define LED_TRIS TRISCbits.TRISC5 #define LED_TRIS TRISCbits.TRISC5
@ -18,25 +18,63 @@ __code uint16_t __at (_CONFIG1) __configword = _WDTE_OFF & _BOREN_ON & _CP_OFF;
// RA5, RA4, RC2, RC3 // RA5, RA4, RC2, RC3
// 'input' pin: RC5 // 'input' pin: RC5
// Uncalibrated delay, just waits a number of for-loop iterations // microsecond delay.
void delay(uint16_t iterations) static inline void delay(uint8_t us)
{ {
uint16_t i; TMR1L = 0;
for (i = 0; i < iterations; i++) { while(TMR1L < us);
// Prevent this loop from being optimized away.
__asm nop __endasm;
}
} }
#define ADDTOUINT16(REG, LIT) __asm \
BANKSEL REG \
MOVLW LIT \
ADDWF _##REG##L, F \
CLRW \
ADDWFC _##REG##H, F \
__endasm
#define SUBFROMUINT16(REG, LIT) __asm \
BANKSEL REG \
MOVLW LIT \
SUBWF _##REG##L, F \
CLRW \
SUBWFB _##REG##H, F \
__endasm
#define PPSO_PWM1 3
void main(void) void main(void)
{ {
LED_TRIS = 0; // Pin as output OSCCON = 0xf0;
LED_PORT = 0; // LED off TRISC = 0;
T1CON = 0x31; // timer1 at 1 mhz, so 1us
while (1) { ANSELA = 0;
LED_PORT = 1; // LED On TRISA = 0;
delay(30000); // ~500ms @ 4MHz //SLRCONC = 0;
LED_PORT = 0; // LED Off LED_PORT = 0;
delay(30000); // ~500ms @ 4MHz PWM1CLKCON = 0x00; // From Fosc w/o prescaler
} PWM1PRH = PWM1PRL = 0xFF; // period: 32 mhz / 65535 = 488 Hz
PWM1PH = 0;
PWM1DCH = PWM1DCL = 0;
PWM1OF = 0;
PWM1INTE = 0x00; // no interrupts enabled
PWM1INTF = 0x00; // clear interrupt flag
PWM1LDCON = 0x80; // load armed
PWM1OFCON = 0x00; // independent run mode
PWM1CON = 0x80; // enable, standard PWM mode, active high output
RC5PPS = PPSO_PWM1;
while(1) {
while (PWM1DCL < 0xFF || PWM1DCH < 0xFE) {
ADDTOUINT16(PWM1DC, 1);
PWMLD = 1;
delay(50);
}
while (PWM1DCL > 0 || PWM1DCH > 0) {
SUBFROMUINT16(PWM1DC, 1);
PWMLD = 1;
delay(50);
}
}
} }

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@ -1,19 +1,19 @@
{ stdenv, fetchurl, bison, flex, boost, texinfo, autoconf, gputils ? null, disabled ? [] }: { stdenv, fetchurl, bison, flex, boost, texinfo, autoconf, zlib, gputils ? null, disabled ? [] }:
let let
allDisabled = (if gputils == null then [ "pic14" "pic16" ] else []) ++ disabled; allDisabled = (if gputils == null then [ "pic14" "pic16" ] else []) ++ disabled;
# choices: mcs51 z80 z180 r2k r3ka gbz80 tlcs90 ds390 ds400 pic14 pic16 hc08 s08 stm8 # choices: mcs51 z80 z180 r2k r3ka gbz80 tlcs90 ds390 ds400 pic14 pic16 hc08 s08 stm8
inherit (stdenv) lib; inherit (stdenv) lib;
in in
stdenv.mkDerivation rec { stdenv.mkDerivation rec {
version = "3.7.0"; version = "3.8.0";
name = "sdcc-${version}"; name = "sdcc-${version}";
src = fetchurl { src = fetchurl {
url = "mirror://sourceforge/sdcc/sdcc-src-${version}.tar.bz2"; url = "mirror://sourceforge/sdcc/sdcc-src-${version}.tar.bz2";
sha256 = "13llvx0j3v5qa7qd4fh7nix4j3alpd3ccprxvx163c4q8q4lfkc5"; sha256 = "08dvvdxd99hb50wvs8m986v3scfj1rdjw18js7pk5n3vxf6nccdk";
}; };
buildInputs = [ bison flex boost texinfo gputils autoconf ]; buildInputs = [ bison flex boost texinfo gputils autoconf zlib ];
configureFlags = '' configureFlags = ''
${lib.concatMapStringsSep " " (f: "--disable-${f}-port") allDisabled} ${lib.concatMapStringsSep " " (f: "--disable-${f}-port") allDisabled}