110 lines
4.6 KiB
Markdown
110 lines
4.6 KiB
Markdown
# Documentation : Teensy 2.0
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## Pinouts and Pin assignments
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* `+` indicates pin
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* `o` indicates unused pin
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* `-`s inserted between some of the pin functions for readability
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* `OC**` pins enclosed in parenthesis had lines over them in the pinout
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### Teensy 2.0
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GND +---.....---+ VCC
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SS PB0 + + PF0 ADC0
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SCLK PB1 + + PF1 ADC1
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MOSI PB2 + + PF4 ADC4
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MISO PB3 + + + + PF5 ADC5
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RTS OC1C OC0A --------- PB7 + PE6 AREF + PF6 ADC6
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OC0B INT0 SCL PD0 + AIN0 + PF7 ADC7
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INT1 SDA PD1 + INT6 + PB6 ADC13 OC1B OC4B
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RXD1 ----------- INT2 --- PD2 + + PB5 ADC12 OC1A (OC4B)
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TXD1 ----------- INT3 --- PD3 + + PB4 ADC11
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OC3A (OC4A) -------- PC6 + + PD7 ADC10 T0 -- OC4D
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ICP3 ----- OC4A --------- PC7 +-+-+-+-+-+-+ PD6 ADC9 T1 - (OC4D) onboardLED
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CTS XCK1 PD5 --/ | | | \-- PD4 ADC8 ------------ ICP1
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VCC ------------------/ | \-------------- RST
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GND --------------------/
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### Teensy 2.0 Pin Assignments
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power_negative GND +---.....---+ Vcc power_positive
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column6 PB0 + + PF0 row6
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o + PF1 row7
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o + PF4 row8
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o o o + PF5 row9
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LED3 OC1C + + PF6 rowA
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I2C SCL + + PF7 rowB
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I2C SDA + + OC1B LED2
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column3 PD2 + + OC1A LED1
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column4 PD3 + + PB4 column0
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column1 PC6 + + PD7 column5
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column2 PC7 +-o-o-o-o-o-o
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* notes:
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* SCL and SDA: Need external pull-up resistors. Sometimes the Teensy
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internal pull-ups are enough (see datasheet section 20.5.1), but i think
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for this project we'll want external ones.
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## Notes about Registers
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### General I/O (see datasheet section 10.2.1)
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DDRxn function PORTxn function
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1 output 1 drive high
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0 drive low
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0 input 1 internal pull-up on
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0 internal pull-up off
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PINxn action function
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write 1 toggles the value of PORTxn
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read returns the logical value (1|0) of the pin
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* notes:
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* Unused pins should be set as input with internal pullup enabled (see
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datasheet section 10.2.6) in order to give them a defined level.
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* PD6 already has a defined level (low) since it's hooked up to the onboard
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LED, so there's no reason to set internal pull-up enabled on it. If we
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do, it will source current to the LED, which is fine, but unnecessary.
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* We want the row pins 'drive high' initially, and the column pins set as
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input with internal pull-up. We'll cycle through driving the row pins low,
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and checking the column pins in the update function.
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### PWM on ports OC1(A|B|C) (see datasheet section 14.10)
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* notes: settings:
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* PWM pins should be set as outputs.
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* we want Waveform Generation Mode 5
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(fast PWM, 8-bit)
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(see table 14-5)
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* set `TCCRB[4,3],TCCRA[1,0]` to `0,1,0,1`
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* we want "Compare Output Mode, Fast PWM" to be `0b10`
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"Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at TOP"
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(see table 14-3)
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this way higher values of `OCR1(A|B|C)` will mean longer 'on' times for the
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LEDs
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* when in a fast PWM mode, set `TCCR1A[7,6,5,4,3,2]` to `1,0,1,0,1,0`
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* we want "Clock Select Bit Description" to be `0b001`
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"clkI/O/1 (No prescaling)"
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(see table 14-6)
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* set `TCCR1B[2,1,0]` to `0,0,1`
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* LEDs will be at minimum brightness until OCR1(A|B|C) are changed (since
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the default value of all the bits in those registers is 0)
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* notes: behavior:
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* The pins source current when on, and sink current when off. They aren't
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set to high impediance for either.
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* In Fast PWM mode setting `OCR1(A|B|C)` to `0` does not make the output on
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`OC1(A|B|C)` constant low; just close. Per the datasheet, this isn't true
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for every PWM mode.
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* abbreviations:
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* OCR = Output Compare Register
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* TCCR = Timer/Counter Control Register
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-------------------------------------------------------------------------------
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Copyright © 2012 Ben Blazak <benblazak.dev@gmail.com>
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Released under The MIT License (MIT) (see "license.md")
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Project located at <https://github.com/benblazak/ergodox-firmware>
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