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6 Commits
8f020f1214
...
eaf024a58a
Author | SHA1 | Date |
---|---|---|
Yorick van Pelt | eaf024a58a | |
Yorick van Pelt | 217dc375d1 | |
Yorick van Pelt | 45068a2816 | |
Yorick van Pelt | 61e0390ad2 | |
Yorick van Pelt | 907625bffb | |
Yorick van Pelt | 29721bce3d |
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@ -8,7 +8,7 @@
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// disable watchdog,
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// and DO NOT disable low voltage programming.
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// The rest of fuses are left as default.
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__code uint16_t __at (_CONFIG1) __configword = _WDTE_OFF & _BOREN_ON & _CP_OFF;
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__code uint16_t __at (_CONFIG1) __configword = _FOSC_INTOSC & _CLKOUTEN_OFF & _WDTE_OFF & _BOREN_ON & _CP_OFF;
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#define LED_PORT PORTCbits.RC5
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#define LED_TRIS TRISCbits.TRISC5
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@ -18,25 +18,63 @@ __code uint16_t __at (_CONFIG1) __configword = _WDTE_OFF & _BOREN_ON & _CP_OFF;
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// RA5, RA4, RC2, RC3
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// 'input' pin: RC5
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// Uncalibrated delay, just waits a number of for-loop iterations
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void delay(uint16_t iterations)
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// microsecond delay.
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static inline void delay(uint8_t us)
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{
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uint16_t i;
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for (i = 0; i < iterations; i++) {
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// Prevent this loop from being optimized away.
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__asm nop __endasm;
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}
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TMR1L = 0;
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while(TMR1L < us);
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}
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#define ADDTOUINT16(REG, LIT) __asm \
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BANKSEL REG \
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MOVLW LIT \
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ADDWF _##REG##L, F \
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CLRW \
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ADDWFC _##REG##H, F \
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__endasm
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#define SUBFROMUINT16(REG, LIT) __asm \
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BANKSEL REG \
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MOVLW LIT \
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SUBWF _##REG##L, F \
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CLRW \
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SUBWFB _##REG##H, F \
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__endasm
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#define PPSO_PWM1 3
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void main(void)
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{
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LED_TRIS = 0; // Pin as output
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LED_PORT = 0; // LED off
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while (1) {
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LED_PORT = 1; // LED On
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delay(30000); // ~500ms @ 4MHz
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LED_PORT = 0; // LED Off
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delay(30000); // ~500ms @ 4MHz
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}
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OSCCON = 0xf0;
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TRISC = 0;
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T1CON = 0x31; // timer1 at 1 mhz, so 1us
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ANSELA = 0;
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TRISA = 0;
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//SLRCONC = 0;
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LED_PORT = 0;
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PWM1CLKCON = 0x00; // From Fosc w/o prescaler
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PWM1PRH = PWM1PRL = 0xFF; // period: 32 mhz / 65535 = 488 Hz
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PWM1PH = 0;
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PWM1DCH = PWM1DCL = 0;
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PWM1OF = 0;
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PWM1INTE = 0x00; // no interrupts enabled
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PWM1INTF = 0x00; // clear interrupt flag
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PWM1LDCON = 0x80; // load armed
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PWM1OFCON = 0x00; // independent run mode
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PWM1CON = 0x80; // enable, standard PWM mode, active high output
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RC5PPS = PPSO_PWM1;
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while(1) {
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while (PWM1DCL < 0xFF || PWM1DCH < 0xFE) {
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ADDTOUINT16(PWM1DC, 1);
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PWMLD = 1;
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delay(50);
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}
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while (PWM1DCL > 0 || PWM1DCH > 0) {
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SUBFROMUINT16(PWM1DC, 1);
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PWMLD = 1;
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delay(50);
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}
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}
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}
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@ -1,19 +1,19 @@
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{ stdenv, fetchurl, bison, flex, boost, texinfo, autoconf, gputils ? null, disabled ? [] }:
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{ stdenv, fetchurl, bison, flex, boost, texinfo, autoconf, zlib, gputils ? null, disabled ? [] }:
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let
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allDisabled = (if gputils == null then [ "pic14" "pic16" ] else []) ++ disabled;
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# choices: mcs51 z80 z180 r2k r3ka gbz80 tlcs90 ds390 ds400 pic14 pic16 hc08 s08 stm8
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inherit (stdenv) lib;
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in
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stdenv.mkDerivation rec {
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version = "3.7.0";
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version = "3.8.0";
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name = "sdcc-${version}";
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src = fetchurl {
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url = "mirror://sourceforge/sdcc/sdcc-src-${version}.tar.bz2";
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sha256 = "13llvx0j3v5qa7qd4fh7nix4j3alpd3ccprxvx163c4q8q4lfkc5";
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sha256 = "08dvvdxd99hb50wvs8m986v3scfj1rdjw18js7pk5n3vxf6nccdk";
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};
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buildInputs = [ bison flex boost texinfo gputils autoconf ];
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buildInputs = [ bison flex boost texinfo gputils autoconf zlib ];
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configureFlags = ''
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${lib.concatMapStringsSep " " (f: "--disable-${f}-port") allDisabled}
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