documentation update

partial-rewrite
Ben Blazak 2013-05-07 01:27:57 -07:00
parent a7d11e0af2
commit 9724cf9331
3 changed files with 83 additions and 40 deletions

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@ -38,17 +38,20 @@
I2C SDA +13 16+ RESET = Vdd(Vcc) (see note)
NC o14-------15+ ADDR = Vss(GND) (see note)
* notes:
* Notes:
* Row and column assignments are to matrix positions, which may or may
or may not correspond to the physical position of the key: e.g. the key
where `row_4` and `column_2` cross will be scanned into the matrix at
`[4][2]`, wherever it happens to be located on the keyboard. Mapping
from one to the other (which only matters for defining layouts) is
handled elsewhere.
* ADDR (pin15): Set slave address to `0b0100000` by connecting to Vss(GND).
* The user-defined bits are the three least significant
* I2C addresses are 7 bits long (the last bit in the byte is used for
indicating read/write)
* RESET (pin16) must be externally biased. Since we're not going to
trigger it ourselves, we can tie it high.
* This is not noted in the I2C Pinout Description section of the
@ -58,6 +61,7 @@
* <http://davidn.org/wp/?p=89>
* <http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1293498979>
## Notes about Registers
register address function (for all bits)
@ -73,29 +77,35 @@
pins configured as output
* IOCON register (see datasheet section 1.6, table 1-5, register 1-8)
* BANK: bit 7; read/write; default = 0
* 1: The registers associated with each port are separated into
different banks
* 0: The registers are in the same bank (addresses are sequential)
* SEQOP: bit 5; read/write; default = 0
* 1: Sequential operation disabled, address pointer does not increment
* 0: Sequential operation enabled, address pointer increments
* notes:
* Notes:
* All addresses given for IOCON.BANK = 0, since that's the default value of
the bit, and that's what we'll be using.
* Initially, we want either columns or rows (see [the options file]
(../../../options.mk)) set as hi-Z without pull-ups, and the other set of
pins set as input with pull-ups. During the update function, we'll cycle
through setting the first set low and checking each pin in the second
set.
* abbreviations:
* IODIR = I/O Direction Register
* IOCON = I/O Control Register
* GPPU = GPIO Pull-Up Resistor Register
* GPIO = General Purpose I/O Port Register
* OLAT = Output Latch Register
* Abbreviations:
* `GPIO`: General Purpose I/O Port Register
* `GPPU`: GPIO Pull-Up Resistor Register
* `IOCON`: I/O Control Register
* `IODIR`: I/O Direction Register
* `OLAT`: Output Latch Register
## I&sup2;C Device Protocol (see datasheet section 1.3, figure 1-1)
@ -134,10 +144,13 @@
Byte : S OP W ADDR --> SR OP R Dout --> P
Sequential : S OP W ADDR --> SR OP R Dout ... Dout --> P
* notes:
* Notes:
* We'll be using sequential mode (ICON.SEQOP = 0; default) (see datasheet
section 1.3.1).
-------------------------------------------------------------------------------
Copyright &copy; 2012 Ben Blazak <benblazak.dev@gmail.com>

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@ -42,15 +42,18 @@
Vcc ----/ | \---- RST
GND-------/
* notes:
* Notes:
* Row and column assignments are to matrix positions, which may or may
or may not correspond to the physical position of the key: e.g. the key
where `row_4` and `column_2` cross will be scanned into the matrix at
`[4][2]`, wherever it happens to be located on the keyboard. Mapping
from one to the other (which only matters for defining layouts) is
handled elsewhere.
* LEDs are labeled using numbers (starting with '1') instead of letters
(starting with 'A') as on the the prototype PCB by Fredrik (late 2012).
* SCL and SDA (pins D(0) and D(1)) need external pull-up resistors.
Sometimes the Teensy internal pull-ups are enough (see datasheet section
20.5.1), but i think for this project we'll want external ones. The
@ -71,12 +74,15 @@
write 1 toggles the value of PORTxn
read returns the logical value (1|0) of the pin
* notes:
* Notes:
* Unused pins should be set as input, with internal pullup enabled in order
to give them a defined level (see datasheet section 10.2.6).
* PD6 (the onboard LED) already has a defined level (low), so there's no
reason to set internal pull-up enabled on it. If we do, it will source
current to the LED, which is fine, but unnecessary.
* Initially, we want either columns or rows (see [the options file]
(../../../options.mk)) set as hi-Z without pull-ups, and the other set of
pins set as input with pull-ups. During the update function, we'll cycle
@ -88,6 +94,7 @@
drive low (treating them as if they were open drain) seems just as
good as, and a little safer than, driving them high when they're not
active.
* We need to delay for at least 1 μs between changing the column pins and
reading the row pins. I would assume this is to allow the pins time to
stabalize.
@ -107,36 +114,55 @@
### PWM on ports OC1(A|B|C) (see datasheet section 14.10)
* notes: settings:
* PWM pins should be set as outputs.
* we want Waveform Generation Mode 5
(fast PWM, 8-bit)
(see table 14-5)
* set `TCCRB[4,3],TCCRA[1,0]` to `0,1,0,1`
* we want "Compare Output Mode, Fast PWM" to be `0b10`
"Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at TOP"
(see table 14-3)
this way higher values of `OCR1(A|B|C)` will mean longer 'on' times for
the LEDs (provided they're hooked up to GND; other way around if they're
hooked up to Vcc)
* when in a fast PWM mode, set `TCCR1A[7,6,5,4,3,2]` to `1,0,1,0,1,0`
* we want "Clock Select Bit Description" to be `0b001`
"clkI/O/1 (No prescaling)"
(see table 14-6)
* set `TCCR1B[2,1,0]` to `0,0,1`
* LEDs will be at minimum brightness until OCR1(A|B|C) are changed
(since the default value of all the bits in those registers is 0)
TCCR1A : Timer/Counter 1 Control Register A
.---------------------------------------------------------------------.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---------------------------------------------------------------------|
| COM1A1 | COM1A0 | COM1B1 | COM1B0 | COM1C1 | COM1C0 | WGM11 | WGM10 |
'---------------------------------------------------------------------'
TCCR1B : Timer/Counter 1 Control Register B
.------------------------------------------------------------------.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|------------------------------------------------------------------|
| ICNC1 | ICES1 | Reserved | WGM13 | WGM12 | CS12 | CS11 | CS10 |
'------------------------------------------------------------------'
* We want:
* `WGM` = `0b0101` : Fast PWM mode, 8-bit (see section 14.8.3)
* `COM1(A|B|C)` = `0b10` : Clear OC1(A|B|C) on compare match, set
OC1(A|B|C) at TOP
* That is, we want `TCCR1A |= 0b10101000`
* This way higher values of `OCR1(A|B|C)` will mean longer 'on'
times for the LEDs (provided they're hooked up to GND; other way
around if they're hooked up to Vcc)
* `CS` = `0b001` : clk_i/o / 1 (no prescaling)
* LEDs will be at minimum brightness until OCR1(A|B|C) are changed
(since the default value of all the bits in those registers is
`0`)
* Notes:
* PWM pins should be set as outputs.
* notes: behavior:
* The pins source current when on, and sink current when off. They aren't
set to high impediance for either.
* In Fast PWM mode setting `OCR1(A|B|C)` to `0` does not make the output on
`OC1(A|B|C)` constant low; just close. Per the datasheet, this isn't
* In Fast PWM mode, setting `OCR1(A|B|C)` to `0` does not make the output
on `OC1(A|B|C)` constant low; just close. Per the datasheet, this isn't
true for every PWM mode.
* abbreviations:
* OCR = Output Compare Register
* TCCR = Timer/Counter Control Register
* Abbreviations:
* `COM`: Compare
* `CS`: Clock Select
* `ICES`: Input Capture Edge Select
* `ICNC`: Input Capture Noise Canceler
* `OCR`: Output Compare Register
* `TCCR: Timer/Counter Control Register
* `WGM`: Waveform Generation Module
-------------------------------------------------------------------------------

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@ -1,13 +1,13 @@
## 8-bit Timer/Counter Register Description (see datasheet section 13.8)
TCCR0A : Timer/Counter Control Register A
TCCR0A : Timer/Counter 0 Control Register A
.---------------------------------------------------------------.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---------------------------------------------------------------|
| COM0A | COM0A | COM0B | COM0B | Reserved | WGM1 | WGM0 |
'---------------------------------------------------------------'
TCCR0B : Timer/Counter Control Register B
TCCR0B : Timer/Counter 0 Control Register B
.---------------------------------------------------------------.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---------------------------------------------------------------|
@ -22,7 +22,7 @@
* `CS` = `0b011` : clk_i/o / 64 (from prescaler)
TIMSK0 : Timer/Counter Interrupt Mask Register
TIMSK0 : Timer/Counter 0 Interrupt Mask Register
.-----------------------------------------------------------------.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|-----------------------------------------------------------------|
@ -30,7 +30,7 @@
'-----------------------------------------------------------------'
* We want:
* `OCIE0A` = `0b1` : enable the Timer/Counter0 Compare Match A
* `OCIE0A` = `0b1` : enable the Timer/Counter 0 Compare Match A
interrupt
@ -72,8 +72,12 @@
* `COM`: Compare
* `CS`: Clock Select
* `FOC`: Force Output Compare
* `OCIE`: Output Compare Interrupt Enable
* `OCR`: Output Compare Register
* `TCCR: Timer/Counter Control Register
* `TCCR`: Timer/Counter Control Register
* `TIMSK`: Timer/Counter Interrupt Mask Register
* `TOIE`: Timer/Counter Overflow Interrupt Enable
* `WGM`: Waveform Generation Module