2012-03-19 08:01:41 +01:00
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# Documentation : Teensy 2.0
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2012-04-10 10:44:27 +02:00
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## Pinout and Pin assignments
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2012-03-19 08:01:41 +01:00
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* `+` indicates pin
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* `o` indicates unused pin
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* `-`s inserted between some of the pin functions for readability
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* `OC**` pins enclosed in parenthesis had lines over them in the pinout
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### Teensy 2.0
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2012-04-12 03:52:31 +02:00
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GND +---.....---+ Vcc
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2012-03-19 08:01:41 +01:00
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SS PB0 + + PF0 ADC0
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SCLK PB1 + + PF1 ADC1
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MOSI PB2 + + PF4 ADC4
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MISO PB3 + + + + PF5 ADC5
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RTS OC1C OC0A --------- PB7 + PE6 AREF + PF6 ADC6
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OC0B INT0 SCL PD0 + AIN0 + PF7 ADC7
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INT1 SDA PD1 + INT6 + PB6 ADC13 OC1B OC4B
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RXD1 ----------- INT2 --- PD2 + + PB5 ADC12 OC1A (OC4B)
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TXD1 ----------- INT3 --- PD3 + + PB4 ADC11
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OC3A (OC4A) -------- PC6 + + PD7 ADC10 T0 -- OC4D
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ICP3 ----- OC4A --------- PC7 +-+-+-+-+-+-+ PD6 ADC9 T1 - (OC4D) onboardLED
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CTS XCK1 PD5 --/ | | | \-- PD4 ADC8 ------------ ICP1
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2012-04-12 03:52:31 +02:00
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Vcc ------------------/ | \-------------- RST
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GND --------------------/
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### Teensy 2.0 Pin Assignments
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2012-04-12 06:05:45 +02:00
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power_negative GND +---.....---+ Vcc power_positive
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column6 PB0 + + PF0 row0
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PB1 o + PF1 row1
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PB2 o + PF4 row2
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PB3 o o o + PF5 row3
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(OC1C) LED3 PB7 + PE6 AREF + PF6 row4
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(SCL) I2C PD0 + + PF7 row5
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2012-05-27 07:50:33 +02:00
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(SDA) I2C PD1 + + PB6 LED1 (OC1B)
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column3 PD2 + + PB5 LED2 (OC1A)
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2012-04-12 06:05:45 +02:00
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column4 PD3 + + PB4 column0
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column1 PC6 + + PD7 column5
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column2 PC7 +-o-o-o-o-o-+ PD6 onboardLED
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PD5 --/ | | | \-- PD4
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Vcc ----/ | \---- RST
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GND-------/
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2012-03-19 08:01:41 +01:00
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* notes:
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2012-07-12 01:06:08 +02:00
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* Row and column assignments are to matrix positions, which may or may
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correspond to the physical position of the key: e.g. the key where `row4`
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and `column2` cross will be scanned into the matrix at `[4][2]`, wherever
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it happens to be located on the keyboard. Mapping from one to the other
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(which only matters for defining layouts) is handled elsewhere.
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2012-04-26 12:44:20 +02:00
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* SCL and SDA: Need external pull-up resistors. Sometimes the Teensy
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internal pull-ups are enough (see datasheet section 20.5.1), but i think
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for this project we'll want external ones. The general recommendation
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for 400kHz I²C seems to be 2.2kΩ.
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2012-03-19 08:01:41 +01:00
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2012-04-01 02:02:55 +02:00
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2012-03-19 08:01:41 +01:00
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## Notes about Registers
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### General I/O (see datasheet section 10.2.1)
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DDRxn function PORTxn function
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1 output 1 drive high
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0 drive low
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0 input 1 internal pull-up on
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0 internal pull-up off
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PINxn action function
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write 1 toggles the value of PORTxn
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read returns the logical value (1|0) of the pin
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* notes:
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2012-04-26 12:44:20 +02:00
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* Unused pins should be set as input, with internal pullup enabled in order
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to give them a defined level (see datasheet section 10.2.6).
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* PD6 (the onboard LED) already has a defined level (low), so there's no
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reason to set internal pull-up enabled on it. If we do, it will source
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current to the LED, which is fine, but unnecessary.
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2012-05-27 07:50:33 +02:00
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* We want the columns to be hi-Z when that column's not being scanned,
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drive low when it is, and the rows to be input with pull-up enabled.
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We'll cycle through driving the columns low and scanning all rows.
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* To set a pin hi-Z on this board, set it as input with pull-up
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disabled.
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2012-04-26 12:44:20 +02:00
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* Switching the row pins between hi-Z and drive low (treating them as
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if they were open drain) seems just as good as, and a little safer
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than, driving them high when the row's not active.
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2012-06-04 06:12:15 +02:00
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* We need to delay for at least 1 μs between changing the column pins and
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reading the row pins. I would assume this is to allow the pins time to
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stabalize.
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* Thanks to [hasu] (http://geekhack.org/member.php?3412-hasu)
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for the suggestion [here]
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(http://geekhack.org/showthread.php?22780-Interest-Check-Custom-split-ergo-keyboard&p=606415&viewfull=1#post606415),
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and [PrinsValium] (http://geekhack.org/member.php?6408-PrinsValium)
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for noting that his firmware had erratic behavior without the delays
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[here]
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(http://geekhack.org/showthread.php?22780-Interest-Check-Custom-split-ergo-keyboard&p=606426&viewfull=1#post606426).
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DOX tried it and confirmed that it worked for his protoype PCB (as of
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3 June 2012) [here]
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(http://geekhack.org/showthread.php?22780-Interest-Check-Custom-split-ergo-keyboard&p=606865&viewfull=1#post606865).
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Before adding a delay we were having [strange problems with ghosting]
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(http://geekhack.org/showthread.php?22780-Interest-Check-Custom-split-ergo-keyboard&p=605857&viewfull=1#post605857).
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2012-03-19 08:01:41 +01:00
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### PWM on ports OC1(A|B|C) (see datasheet section 14.10)
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2012-03-28 10:03:11 +02:00
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* notes: settings:
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2012-04-26 12:44:20 +02:00
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* PWM pins should be set as outputs.
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* we want Waveform Generation Mode 5
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(fast PWM, 8-bit)
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(see table 14-5)
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* set `TCCRB[4,3],TCCRA[1,0]` to `0,1,0,1`
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* we want "Compare Output Mode, Fast PWM" to be `0b10`
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"Clear OCnA/OCnB/OCnC on compare match, set OCnA/OCnB/OCnC at TOP"
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(see table 14-3)
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this way higher values of `OCR1(A|B|C)` will mean longer 'on' times for
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the LEDs (provided they're hooked up to GND; other way around if they're
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hooked up to Vcc)
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* when in a fast PWM mode, set `TCCR1A[7,6,5,4,3,2]` to `1,0,1,0,1,0`
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* we want "Clock Select Bit Description" to be `0b001`
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"clkI/O/1 (No prescaling)"
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(see table 14-6)
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* set `TCCR1B[2,1,0]` to `0,0,1`
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* LEDs will be at minimum brightness until OCR1(A|B|C) are changed
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(since the default value of all the bits in those registers is 0)
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2012-03-19 08:01:41 +01:00
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2012-03-28 10:03:11 +02:00
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* notes: behavior:
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2012-04-26 12:44:20 +02:00
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* The pins source current when on, and sink current when off. They aren't
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set to high impediance for either.
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* In Fast PWM mode setting `OCR1(A|B|C)` to `0` does not make the output on
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`OC1(A|B|C)` constant low; just close. Per the datasheet, this isn't
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true for every PWM mode.
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2012-03-28 10:03:11 +02:00
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2012-03-19 08:01:41 +01:00
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* abbreviations:
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2012-04-26 12:44:20 +02:00
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* OCR = Output Compare Register
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* TCCR = Timer/Counter Control Register
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2012-03-19 08:01:41 +01:00
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-------------------------------------------------------------------------------
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2012-03-27 12:06:52 +02:00
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Copyright © 2012 Ben Blazak <benblazak.dev@gmail.com>
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2012-04-12 08:10:37 +02:00
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Released under The MIT License (MIT) (see "license.md")
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2012-03-27 12:06:52 +02:00
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Project located at <https://github.com/benblazak/ergodox-firmware>
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2012-03-19 08:01:41 +01:00
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